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J-MISFET Hybrid Dual-Gate Switching Device for Multifunctional Optoelectronic Logic Gate Applications

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dc.contributor.author김민구-
dc.date.accessioned2024-05-23T03:34:31Z-
dc.date.available2024-05-23T03:34:31Z-
dc.date.issued2024-04-
dc.identifier.issn1936-0851-
dc.identifier.urihttps://ir.ymlib.yonsei.ac.kr/handle/22282913/199256-
dc.description.abstractHigh-performance and low operating voltage are becoming increasingly significant device parameters to meet the needs of future integrated circuit (IC) processors and ensure their energy-efficient use in upcoming mobile devices. In this study, we suggest a hybrid dual-gate switching device consisting of the vertically stacked junction and metal–insulator–semiconductor (MIS) gate structure, named J-MISFET. It shows excellent device performances of low operating voltage (<0.5 V), drain current ON/OFF ratio (∼4.7 × 105), negligible hysteresis window (<0.5 mV), and near-ideal subthreshold slope (SS) (60 mV/dec), making it suitable for low-power switching operation. Furthermore, we investigated the switchable NAND/NOR logic gate operations and the photoresponse characteristics of the J-MISFET under the small supply voltage (0.5 V). To advance the applications further, we successfully demonstrated an integrated optoelectronic security logic system comprising 2-electric inputs (for encrypted data) and 1-photonic input signal (for password key) as a hardware security device for data protection. Thus, we believe that our J-MISFET, with its heterogeneous hybrid gate structures, will illuminate the path toward future device configurations for next-generation low-power electronics and multifunctional security logic systems in a data-driven society.-
dc.description.statementOfResponsibilityrestriction-
dc.languageEnglish-
dc.publisherAmerican Chemical Society-
dc.relation.isPartOfACS NANO-
dc.rightsCC BY-NC-ND 2.0 KR-
dc.titleJ-MISFET Hybrid Dual-Gate Switching Device for Multifunctional Optoelectronic Logic Gate Applications-
dc.typeArticle-
dc.contributor.collegeCollege of Medicine (의과대학)-
dc.contributor.departmentDept. of Medical Engineering (의학공학교실)-
dc.contributor.googleauthorSi Eun Yu-
dc.contributor.googleauthorHan Joo Lee-
dc.contributor.googleauthorMin-Gu Kim-
dc.contributor.googleauthorSeongil Im-
dc.contributor.googleauthorYoung Tack Lee-
dc.identifier.doi10.1021/acsnano.4c01450-
dc.contributor.localIdA06575-
dc.relation.journalcodeJ00005-
dc.identifier.eissn1936-086X-
dc.identifier.pmid38629449-
dc.identifier.urlhttps://pubs.acs.org/doi/10.1021/acsnano.4c01450-
dc.subject.keywordJFET-
dc.subject.keywordMISFET-
dc.subject.keywordhybrid dual-gate FET-
dc.subject.keywordoptoelectronic security logic system-
dc.subject.keywordswitchable logic-
dc.contributor.alternativeNameKim, Min-Gu-
dc.contributor.affiliatedAuthor김민구-
dc.citation.volume18-
dc.citation.number17-
dc.citation.startPage11404-
dc.citation.endPage11415-
dc.identifier.bibliographicCitationACS NANO, Vol.18(17) : 11404-11415, 2024-04-
Appears in Collections:
1. College of Medicine (의과대학) > Dept. of Medical Engineering (의학공학교실) > 1. Journal Papers

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