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A VLSI implementation of dual AC-3 and MPEG-2 audio decoder

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dc.contributor.author유선국-
dc.date.accessioned2020-07-02T16:42:00Z-
dc.date.available2020-07-02T16:42:00Z-
dc.date.issued1998-
dc.identifier.issn0098-3063-
dc.identifier.urihttps://ir.ymlib.yonsei.ac.kr/handle/22282913/176302-
dc.description.abstractThis paper presents a dual AC-3 and MPEG-2 audio decoder which can decode both bit-streams. MPEG-2 synthesis filtering is modified by the 32-point FFT to share the common data path with the AC-3's. The architecture of the decoder consists of a programmable DSP core and a hardwired common synthesis filter. The DSP core was designed suitable for audio processing. The common filter design adopts the suggested MPEG-2 modified synthesis filtering. The proposed system was synthesized with 0.6 /spl mu/m technology and proven to be cost-effective.-
dc.description.statementOfResponsibilityrestriction-
dc.languageEnglish-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.relation.isPartOfIEEE TRANSACTIONS ON CONSUMER ELECTRONICS-
dc.rightsCC BY-NC-ND 2.0 KR-
dc.titleA VLSI implementation of dual AC-3 and MPEG-2 audio decoder-
dc.typeArticle-
dc.contributor.collegeCollege of Medicine (의과대학)-
dc.contributor.departmentDept. of Medical Engineering (의학공학교실)-
dc.contributor.googleauthorWoo-Suk KO’, Sun-Kook Yoo2, Sung-Wook Park’, Joon-Seok Kim’ and Dae-Hee Youn’-
dc.identifier.doi10.1109/30.713207-
dc.contributor.localIdA02471-
dc.relation.journalcodeJ03826-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/713207-
dc.contributor.alternativeNameYoo, Sun Kook-
dc.contributor.affiliatedAuthor유선국-
dc.citation.volume44-
dc.citation.number3-
dc.citation.startPage872-
dc.citation.endPage877-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON CONSUMER ELECTRONICS, Vol.44(3) : 872-877, 1998-
Appears in Collections:
1. College of Medicine (의과대학) > Dept. of Medical Engineering (의학공학교실) > 1. Journal Papers

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